International Journal of Electronics & Communication Technology Vol 5.4 ver-1
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S.No. |
Research Topic |
Paper ID |
1 |
Memristor: The Fourth Circuit Element
Chintan Patel, Nadeem Masani, Tushar Parekh
Abstract
There were only three fundamental passive devices used until now for designing electronic circuits which are resistors, capacitors, inductors. Now a fourth fundamental passive element, ‘Memristor’ is added to group of non-linear passive two terminal electrical components. In this paper we have explained Memristor, its characteristics and given its applications.
Full Paper
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IJECT/54/1/A-237 |
2 |
LTE and Voice Over LTE
Gautam Wadhawan, Garima Anand
Abstract
From 1970 to 2014, from 1G to 4G, world witnessed a great modulation in mobile telecommunications. This advancement in the mobile telecommunications is directly proportional to the expansion seen in the number of mobile connections. In this paper we shall study the evolution of the LTE network form the first generation. While the first generation network was purely meant for voice calling the companies are now again struggling for the method of transmission of the voice over LTE. The popularity and easiness in using data services over mobile phone has given a new way to provide voice and video calling services using the internet.
But with the inventions comes the challenges. The methods to provide voice over the newly growing network of LTE are yet to be explored. In this paper we shall understand the LTE and the revolution it will bring in the mobile telecommunications world and also explore the methods for the transmission of voice over the LTE.
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IJECT/54/1/A-238 |
3 |
Industrial Automation: A Modern Perspective
Abhinav Paliwal, Ashish kumar Gupta
Abstract
Despite years of activity, truly open and intelligent control systems seem still to be a promise of the future. Agreement on common architectures and application objects is needed to raise open control systems from exchanging raw data to the level of real interoperability of off-the-shelf components. Future control platforms and programming languages should have new built-in mechanisms that support implementation of intelligent functions, such as flexible resource management and exception handling.
This article argues that many of these challenges can be met by taking full advantage of emerging software engineering technologies. This also means that the modeling techniques and design practices of software engineering should be combined with the traditional ways of thinking in automation. General Terms Industrial automation, PLC, LAN, SCADA
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IJECT/54/1/A-239 |
4 |
Pipelined Processor With Reduced Hardware Overhead
Md.Rameez, M.Vinodh Kumar
Abstract
Large SRAM arrays that are widely used as cache memory in microprocessors and application-specific integrated circuits can fill a significant portion of the die area. In an attempt to enhance the performance of such chips, large arrays of fast SRAMs help to upgrade the system performance. SRAM is important component used for the cache memory in microprocessors, mainframe computers, engineering workstations and memory in hand-held devices due to high speed and low power consumption. A SPSRAM which functions like a DPSRAM by dividing the on-chip memory into four sub banks can be used to achieve high throughput, less hardware requirement and high bandwidth utilization.
Control dependencies are one of the major constraints to increase the performance of pipelined processors. This paper deals with wiping out penalties, also to achieve high throughput, less hardware overhead and high bandwidth utilization in pipelined processor. Here my analysis is in the light of MIPS pipelined processor. Here an enhanced pipelined processor architecture with wiping out branch and jump penalty is presented. In the proposed architecture clock per instruction for branch and jump instruction is below that of MIPS architecture. Here it is also shown the design of the required cache memory cell for the enhanced architecture. The proposed architecture using sub-bank DP memory is verified and synthesized using Xilinx 12.2.
Full Paper
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IJECT/54/1/A-240 |
5 |
Performance Evolution of 8×8 Reversible Vedic UT Multiplier For Low Power and High Speed Operations
K.Krishna Sarma, V.N.Lakshmana Kumar
Abstract
Multiplier design is always a challenging task, however many designs are proposed, the user needs demands much more optimized ones. Vedic mathematics provides some algorithms that evaluate fast results, both in mental calculations or hardware design. Power dissipation is continuously reduced by the use of Reversible logic.
The reversible Urdhva Tiryakbhayam Vedic multiplier is one such multiplier which is effective both in terms of speed and power. In this thesis we can increase the performance of the design. This multiplier has application over designing Fast Fourier Transforms (FFTs) Filters and other applications of DSP like imaging, software defined radios, wireless communications.
In previous, booth multiplier is used to perform high speed and low power operations, but in this proposed reversible Vedic for bit 8×8 can reduce delay, area and power. In this thesis the values can be compared and a proof of concept will be made to prove that 8×8 UT vedic multiplier using reversible logic gates can perform better than booth multiplier in terms of delay, area and power.The proposed design is veriied by using Xilinx 12.3.
Full Paper
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IJECT/54/1/A-241 |
6 |
Design And Implementation of Routing Management System with Error Detection in Optical Networks
Meenakshi, Sandeep Dhariwal
Abstract
Optical network is a network that consists of a large number of low powered devices, called sensor nodes, which can be positioned in harsh environment; sensor nodes are prone to have faults. It is thus desirable to notice and discover faulty nodes to ensure the quality of service of networks. In this thesis, it proposes a design of efficient route in presence of large no. of faults. There are number of proposed schemes in this thesis. In 1st scheme, it provides an
efficient route without any error. So, it becomes an ideal scheme in this work. In 2nd scheme, route will stop if there is any error occurs in the path so it wastes time as well as packets data. In final proposed scheme, it overcomes all problems occurred in schemes.
In this, it provides a completer path from sender to receiver without any packet loss. Accordingly, this study proposes a mechanism which can both tolerate and locate data inconsistency failures in optical networks. The proposed mechanism was implemented with MATLAB. The evaluation results should demonstrate the ability of the mechanism to identify faulty nodes anciently and with limited overheads. The performance parameters like delay, BER, blocking probability etc. are computed and compared with the ideal scheme and error scheme. The results are shown with the help of GUI.
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IJECT/54/1/A-242 |
7 |
Fault Secure Decoder for Memory Applications Using Efficient EG-LDPC Codes
T.Madana Mohan Reddy, T.Anandakrishna
Abstract
In the modern digital system design the reliability and security of memories are essential considerations. As technology scales, memory devices become larger and more powerful error correction codes are needed to protect memories from soft errors. Low Density Parity Check (LDPC) Codes are the class of linear block codes which provide near capacity performance on large collection of data transmission channels while simultaneously feasible for implementable decoders. One specific type of Low density parity check codes, namely Euclidian Geometry – Low density parity check are used due to their fault secure detection capability, higher reliability and lower area overhead. One of the existing methods for error detection in Euclidian Geometry – Low density parity check is the one step Majority Logic Decoder (MLD) method used to detect the error in memory device itself. The one step MLD would decode a codeword of 15-bits which would be excessive for most applications. And the proposed one is used to decode a code word of 63-bits.When it is compared to MLD method; it has larger choice of word lengths and error correction capabilities.
Full Paper
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IJECT/54/1/A-243 |
8 |
Wireless Energy Transfer Using Renewable Solar Energy
Adarsh Srinivas, Anvi Vora, Deep Patel, Kaushik Jain
Abstract
This paper aims at using the ubiquitous solar energy and transferring the collected electrical energy to the home appliances wirelessly. A module of Wireless Energy Transfer (WET) which uses the technology of magnetic resonance has been used. In this, a solar panel having 240W, 30 V, Poly Crystalline Silicon Photovoltaic solar panel with 60 cells is used to collect the solar energy. This energy is then transferred using the WET module consisting of two sub-modules: Driving circuit and two coils which are mutually inducted for wireless energy transfer at resonant frequency. In the driver circuit, we make use of class-D RF amplifier. The major advantage of a class-D amplifier is that it can be more efficient than analog amplifiers, with less power dissipated as heat in the active devices. The types of coils used for are circular coil, flat spiral coil and flat Rodin coil. High Quality factor Q (>100) coil is used for minimum power dissipation. With these two criteria, the wireless energy from solar cell can be transferred with highest efficiency and almost zero losses with higher transmission distances.
Full Paper
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IJECT/54/1/A-244 |
9 |
Design of Low Area Branch Penalty Free Pipelined Processor Architecture
K. Rajesh, B. Rama Rao
Abstract
Branch prediction techniques are widely used to reduce the performance penalties that are caused by branch instructions in pipelined processor such as MIPS. But these techniques do not completely eliminate the penalties that are caused by branch instructions. Here we present an efficient architecture for pipelined processor that eliminates the branch and jump penalties with minimum hardware resources. In the proposed architecture we use sub-bank dual port memory, so hardware requirement for this architecture is reduced when compared to previous architecture. The proposed architecture is implemented in Xilinx tool using Verilog.
Full Paper
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IJECT/54/1/A-245 |
10 |
Simulation of Efficient MPPT Using P&O Technique
Ekta, Er. Maninder Kaur
Abstract
The purpose of this paper is to implement P&O algorithm for MPPT and efficient power so obtained is compared to the system without using MPPT. The Matlab-Simulink is used in this paper to establish a model of PV system with MPPT function. This system is developed by merging the models of established solar module and DC-DC boost converter with the algorithms of perturbation and observation (P&O).
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IJECT/54/1/A-246 |
11 |
Design and Implementation of Compact Circular Microstrip Patch Antenna for Bandwidth Enhancement using DGS
Shivapriya, Anoop C N
Abstract
In our paper the main aim is to design and implementation of Circular Microstrip Patch Antenna (on rectangular substrate).
The cavity model analysis is used to design and analyze the CMPA for the resonating frequency of 1.8330GHz to cover the DCS band (1.710GHz to 1.880GHz). The CMPA is simulated using Electromagnetic Simulator based on FEM model. These simulated results are compared with measurement results using Agilent Network Analyzer for practical validation.
Full Paper
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IJECT/54/1/A-247 |
12 |
Quadratic Filter For Spectral Estimation
Babu M, Preethy V, 3Saranya S
Abstract
Polynomial filters are required for non-linear system at which the performances of linear filters are failed miserably is that of trying to relate two signals with non-overlapping spectral component. In non-linear filters the accuracy will be less. It can be improved by volterra series. Volterra kernel depends on the order of truncated volterra series. Adaptive Algorithm is widely used for the kernel estimation. Volterra series are similar to Taylor series with memory.
It is difficult to implement a polynomial filer but quadratic filter is easy to implement than polynomial filter. Because quadratic filter will produce the result in a compact form were polynomial is used for deriving a spectrum. When a sinusoidal signal passes through the channel, the quadratic and cubic term gives rise to nonlinear distortion such as harmonic and inter-modulation distortion.
Xilinx software is used to implement and obtain digitize signals in signal power. This project is to implement a squaring operation which is involved in a quadratic filter using FPGA. Because the field programmable gate array is most suitable for real time application and spectral estimation. Implementation of FIR filters in poly-phase structure since the structure is efficient and easy to implement. FIR filter is used to detect the distortion in the system. Real time quadratic filter is used for spectral estimation.
Full Paper
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IJECT/54/1/A-248 |
13 |
Performance Enhancement of RMPA on 3.2 Layer at 2 GHz
Sandeep Yadav, Prof. Umesh Barahadiya
Abstract
In this paper, a novel printed rectangular patch antenna with 3.2 layer, resonant at 2 GHz frequency, is proposed. The given antenna is composed of a rectangular patch antenna with two opposite E-shape structure on 3.2 layer. The antenna is designed for resonating at 2 GHz frequency. The return loss of the proposed antenna is -40 dB at 2 GHz frequency which is in good agreement.
A rectangular vertical strip is also used for minimizing the return loss. The 50 ohm port is used to fed the proposed antenna.
Full Paper
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IJECT/54/1/A-249 |
14 |
A Fault Tolerant Scheme for Vehicle Ethernet with Consideration of Trade-off Between Bandwidth Utilization and Recovery Delay
Sunghyun Im, JuWook Jang
Abstract
In current vehicles, research for an Ethernet based In-Vehicle Network is actively progressed. In IEEE working group, the Audio and Video Bridging (AVB) technology promises a standard approach to the Ethernet based In-Vehicle Network. For vehicle, one important aspect is a delay of reconfiguration in In-Vehicle Network and Stream Reservation Protocol (SRP) for control data in AVB. However, there is no way to pre-determine the delay of SRP for in-vehicle network.A previous research proposed a redundancy protocol based in RSTP and Multiple Stream Reservation Protocol (MSRP). They don’t need additional stream reservation over redundant paths after disruption on the link between talker and listener since MSRP reserves bandwidth to all of path in network for control stream. However, a side effect of this scheme is that certain amounts of bandwidth are wasted. In this paper, we propose a new scheme which reserves bandwidth for control stream on all paths, limiting a subset of all paths to transmitting data. This scheme has trade-off between the redundant protocol delay and the usage of bandwidth.
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IJECT/54/1/A-250 |
15 |
An Investigation on Two Layer Frequency Selective Surface for Broadband Operation
M.K.Pain, A.Kumar, R.K.Ray, S.Sarkar, D.Sarkar, P.P.Sarkar
Abstract
In this paper, a novel design for broadband frequency selective surface has been presented. The design combines the transmission characteristics of two different designs to obtain broadband characteristics. The two designs are stacked over one another to obtain a staggering effect in the resonant frequencies. This staggering effect has been used to obtain the broadband characteristics. Though the design presented, is a multilayered design, the fabrication of the design is very simple. The design has been fabricated and the experimental results are presented in this paper.
Full Paper
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IJECT/54/1/A-251 |
16 |
Bayesian Classifier based Automatic Phoneme Recognizer for Kannada
Prashanth Kannadaguli, Vidya Bhat
Abstract
We build an automatic phoneme recognition system based on Bayesian Multivariate Modeling which is a static scheme.
Phoneme models were built by using stochastic pattern recognition and acoustic phonetic schemes to recognise phonemes. Since our native language is Kannada, a rich South Indian Language, we have used 15 Kannada phonemes to train and test these models. As Mel – Frequency Cepstral Coefficients (MFCC) are well known acoustic features of speech, we have used the same in speech feature extraction. Finally performance analysis of models in terms of Phoneme Error Rate (PER) justifies the fact that though static modeling yields good results, improvization is necessary in order to use it in developing Automatic Speech Recognition systems.
Full Paper
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IJECT/54/1/A-252 |
17 |
Efficient Utilization of Spectral Mask in OFDM Based Cognitive Radio Networks
Konidana Arun Kumar, M.Srilatha
Abstract
Cognitive Radio (CR) is used to access the unused licensed spectrum by the unlicensed users. While accessing the licensed spectrum by CR user’s radiation or signals of Cognitive radio users interfere and disturb the licensed user signal. This problem can be rectified by constructing a spectrum mask across the CR users, which eliminates the Out of Band radiation of CR users.
In this paper we propose a method to restrict Cognitive Radio signals within the Spectral mask and proposed new techniques for efficient utilization of spectral mask in Cognitive Radio Networks. Our simulation results show that the Out of band radiation is within the spectral mask without reducing the BER and our proposed techniques will reduce the computational complexity
in the Network.
Full Paper
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IJECT/54/1/A-253 |
18 |
Self Sustainable Controlling Unit Using Piezoelectric Element
Harshil Sheth, Ronak Totla, Darpan Damani
Abstract
With the advancements in technology, a lot of options are proposed, by implementing more efficient and cost effective methods, to eliminate the use of batteries as a source of power. Emphasis is given over on systems to be self sufficient in terms of power generation and usage. This paper discusses the use of piezoelectric material to generate energy and serve as an alternative source of power. The proposed idea is best applicable as a source of power in systems which use RF modules for communication to transmit controlling/addressing signals where the power requirements are minimal and usage is also infrequent. Such devices are a potential alternative in the environments which require no wiring, no line of sight communication or batteries. The paper discusses a model unit which is self sufficient in design to produce power for transmission when pressure is applied. This opens up all new horizons to explore when it comes to self powered modules.
Full Paper
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IJECT/54/1/A-254 |
19 |
Content Based Image Retrieval System Using SVM Technique
Mohita Bansal, Prof. Balraj Singh Sidhu
Abstract
Content Based Image Retrieval is an important technique which uses visual contents to retrieve images from large database. Many traditional methods have been employed to retrieve images. Relevance feedback is often a critical component when designing image databases. Relevance feedback interactively determines the user’s query by asking the user whether image is relevant or not. The use of support vector machine active learning algorithm makes this task more easy and effective. This algorithm selects the most informative images that satisfies the user’s requirement. Experiment results show that this algorithm achieves the effective results.
Full Paper
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IJECT/54/1/A-255 |
20 |
Design and Simulation of GaN HEMT Based Power Amplifier
Ruchi, Sanjay Kumar Tomar, Meena Mishra, Ashok Mittal
Abstract
The paper demonstrates the designing and simulation of highly efficient GaN high electron mobility transistors (HEMT) based Class F Power Amplifier (PA) at L Band. Load and source pull techniques are used to find the optimum impedances at maximum power added efficiency (PAE) and output power. Small signal parameters are simulated and are presented over a frequency band of 0.960-1.1 GHz .While large signal parameters including PAE and power output are presented at an operating frequency of 1GHz. High efficiency of 81.044 % is achieved by terminating the harmonics at the input as well as at the output and a high output power of 12 W is achieved by impedance matching or tuning technique. The matching network is built on RT/Duroid by Rogers with 2.3 dielectric constant. The device used for the circuit is GaN
HEMT CGH40010 obtained from the manufacture Cree.
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IJECT/54/1/A-256 |
21 |
A Study Based Research Paper on Charge Transport Through Moletronics (Graphene Nano Tube) Concept Using Different types of Electrodes: A Review
Ms. Anushree Sarkar, Ms. Garima Agrawal, Mr. Pradeep Kumar Jaisal
Abstract
In this paper, a study based or review section will be discussed the topic about GNT through pursue with the help of different electrodes & influence of changing the material of electrodes on the transport properties of single or multi junction comprising GNT (Graphene Nano Tube) stringed to two semi-infinite electrodes using semi empirical model. The investigation of electron transport through GNT was accomplished by linking it to different metallic electrodes like platinum, silver under different bias voltages within Keldysh’s non- equilibrium Green Function formulism using Extended Huckel Theory (EHT) .By comparing the V-I curves obtained using different metallic electrodes, we perceived that platinum showed maximum conductance and silver showed transmission of current amidst strongest coupling and thus affirmed to be the most effective material for electrodes for nanometer scale molecular junctions, when compared with other metallic electrodes.
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IJECT/54/1/A-257 |
22 |
Rectangular Microstrip Patch Antenna Integrated With “INTERCONNECTED SHI” Shaped Double Negative Metamaterial Without Affecting mportant Parameters
Abhishek Singh Kushwaha, H. P. Sinha
Abstract
In this work, Authors designed a micro-strip patch antenna integrated with “INTERCONNECTED SHI” double negative left handed metamaterial at a height of 3.2mm from the ground plane.
The speculation and invention of Left-Handed Meta Material (LH MTM) has sparked the interest of many researchers globally. This material is said to have simultaneous negative parameters or double negative parameters [1] (DNG Parameters) of the permittivity and permeability. Besides, it has the ability to improve the gain of antenna due to its focusing effect from its negative refractive index (NRI) characteristics. In this work CST-MWS (COMPUTER SIMULATION TECHNOLOGY- MICROWAVE STUDIO) SIMULATION SOFTWARE is used to compare the return loss and bandwidth of the micro-strip patch antenna at a frequency of 2GHz and height of 3.2 mm from the ground plane with the proposed meta material structure. Shaped double negative left-handed meta material. It has been observed that the return loss has improved by 17 dB and the bandwidth is improved by 5MHz while the directivity remains constant.
Full Paper
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IJECT/54/1/A-258 |
23 |
Performance Improvement of RMPA Loaded With Symmetrical Structures at 2 GHz
Sandeep Yadav, Prof. Umesh Barahadiya
Abstract
In this paper, a novel printed RMPA with 3.2 layer, resonanting at 2 GHz frequency, is proposed. The given antenna is composed of a rectangular patch antenna with two opposite E-shape structure on 3.2 layer. The antenna is designed for resonating at 2 GHz frequency. The return loss of the proposed antenna is -47.1 dB and VSWR is 1.001 at 2 GHz frequency which is in good agreement. A rectangular vertical strip is also used for minimizing the return loss. The 50 ohm port is used to fed the proposed antenna.
Full Paper
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IJECT/54/1/A-259 |
24 |
Effect of Modulation on BER Performance in Wireless Channel
Shefali Rai, R.G Purandare
Abstract
The paper presents a study of the effect of modulation schemes on the parameters that affect the signal in the wireless medium. Theimportant parameters that have been consideredare BER, SNR, Fading, bandwidth efficiency. These help to identify the strength or quality of a signal in any wireless channel.
The modulation schemes that have been considered are BPSK, QPSK, MSK and QAM. Every modulation scheme has been studied under AWGN, w.r.t BER, SNR. The theoretical and simulated values ofBERhave been compared in MATLAB. The performance of the modulation schemes under various parametric quantities and depending on the application, a suitable scheme is chosen that provides the best performance of the wireless system when realized.
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IJECT/54/1/A-260 |
25 |
Fast Fourier Transform Architectures: A Survey and State of the Art
Anwar Bhasha Pattan, Dr. M. Madhavi Latha
Abstract
Fast Fourier Transform (FFT) algorithm is widely used in many signal processing and communication systems. Due to its intensive computational requirements, it occupies large area and consumes high power if implemented in hardware. Efficient algorithms are developed to improve its architecture. In this paper, a variety of available FFT algorithms are presented and then different architectures are outlined by exploring the techniques and algorithms involved in each of the architectures. The widely adopted architectures and trends in architectural modification to reduce power consumption and area and to achieve high throughput are discussed.
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IJECT/54/1/A-261 |