INTERNATIONAL JOURNAL OF ELECTRONICS & COMMUNICATION TECHNOLOGY (IJECT)-VOL IV ISSUE II, VER. 1 APR. TO JUNE 2013
International Journal of Electronics & Communication Technology Vol. 4 Issue 2, Ver. 1
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S.No. | Research Topic | Paper ID | |
1 | Comparative Study of 8T SRAM Cell using CMOS, FinFET and CNTFET in Nanoscale Technologies
Parimala Devi.M, Dr. Sharmila.D, Meenakshi.K Abstract In the world of Integrated Circuits, Complementary Metal–Oxide– Semiconductor (CMOS) has lost its credentiality during scaling beyond 32nm. Scaling causes severe Short Channel Effects (SCE) which are difficult to suppress. As a result of such SCE many alternate devices have been studied. Some of the major contestants include Multi Gate Field Effect Transistor (MuGFET) like FinFET and Carbon Nano Tube Field Effect Transistor (CNTFET). In this paper, 8T SRAM cell is analyzed in CMOS, FinFET and CNTFET structures and their performances like standby power Consumption and static noise margin are compared. |
IJECT/42/1/B-669 | |
2 | RCS Computation of Shapes Obtained by Cascading Simple Objects Using PO Method and Results Obtained Using Matlab Simulation Software
N.Swathi, Dr. K.S.Ranga Rao, Dr. S.Koteswara Rao, N.Usha Rani, N.Sharma Abstract In this paper Radar Cross Section of simple objects like sphere, cylinder, cone, frustum and circular flat plate is computed with respect to the parameters like size, frequency, and aspect angle. Rectangular plots are obtained for RCS in dbsm versus aspect angle for the given simple objects using Matlab simulation[6]. The analysis given in this paper is based on far field monostatic RCS measurements in the optical region. Prediction is carried out using Physical Optics (PO) method for determining RCS of simple objects[1]. In this paper not only the RCS of simple objects but also the cascaded objects with backscatter has been computed using Matlab Simulation. RCS treatment in this paper is based on the Narrow Band. |
IJECT/42/1/B-670 | |
3 | Parallel-Dependent Processing Model of Face Recognition
Gaurav Sharma, Lalit Mohan, Sumit Kashyap Abstract Face recognition has gained much attention in the last two decades due to increasing demand in security and law enforcement applications. Face recognition image analysis is carried out in two different domains i.e. frequency domain (DFT, DWT, DCT) |
IJECT/42/1/B-671 | |
4 | E-commerce Problems in India
Nitin Bhagat Abstract Over last few decades the popularity of e-commerce has tremendously increased due to its quick and convenient way of exchanging goods and regional and global services. This paper intended to investigate the prevailing problems of E-commerce in India by reviewing relevant literature and monitoring the perspective situation of E-commerce in India. In the competitive era every trader in the world thinks strategically and commercially establishing a profitable, reasonable, reliable and prosperous way of doing business, which eventually emerged as E-commerce worldwide. Private and public business organizations including different departments of Government in India started visioning the prospect of E-commerce since 1990. In this paper I illustrated these problems under several categories as social, commercial, political and also payment security. |
IJECT/42/1/B-672 | |
5 | An Efficient Embedded DRAM Testing Algorithm With Multiple Memory Arrays
S. Jayaprabha, B. Ramesh, S. Premalatha Abstract With the strong need to an effective and economic embeddedmemory core in the Soc, researchers attempt to carry commodity DRAM’s advantages from a commodity memory into a Soc. In the past decade, a lot research effort has been put into the area of the embedded-DRAM (eDRAM) technologies to reduce eDRAM’s process adders to the CMOS process. However, few previous research works have discussed the testing strategies used for eDRAMs, which cannot be directly carried from the testing of commodity DRAMs. In this project, first compare the eDRAM testing to the commodity-DRAM testing and SRAM testing since an eDRAM core utilizes the DRAM cells with the SRAM interface. Then, list the fault models which should be specially considered in the eDRAM testing and find out the corresponding test sequence for each fault model. The main objectives of this project include (1) develop a minimal test algorithm for eDRAM testing, (2) develop an effective scheme to shorten the retention-test time in eDRAM testing based on increasing the temperature, which is a special function used in eDRAMs compared to commodity DRAMs. |
IJECT/42/1/B-673 | |
6 | Removal of Artifacts from EEG Signals using Independent Component Analysis
P.R.Gomathi, R.Raghupathy Abstract Electroencephalographic (EEG) recordings are often contaminated by artifacts, i.e., signals with non-cerebral origin that might mimic some cognitive or pathologic activity, this way affecting the clinical interpretation of traces.In this paper, Independent Component Analysis (ICA) is applied to EEG signals collected from different mental tasks in order to remove the artifacts from the EEG signals.There are several algorithms based on different approaches for ICA widely in use for all sort of applications. These algorithms include, but not limited to, the popular Fast-ICA, Joint Approximate Diagonalization of Eigenvalues (JADE), Infomax, and Extended Infomax etc. A framework for accommodating four ICA algorithms is developed to estimate the convergence speed of the algorithms and hence selects the best algorithm for the specific type of data. |
IJECT/42/1/B-674 | |
7 | Influence of FWM on the NRZ and CRZ Modulation Signals in WDM Systems
Brijesh Kumar, Reetesh Singh, Arvind Kumar Jaiswal, Mukesh Kumar, Rohini Saxena Abstract In this paper we have presented the nonlinear optical effects of FWM on the NRZ and CRZ modulation signals. NRZ modulation format has been used extensively in many data communication systems because of its relative ease of generation.CRZ modulation can provide a combination of increase capacity and better performance for long haul under see cable system at channel data rates up to 40 Gb/sec. FWM effects occurs more in NRZ system near zero dispersion value. Effect of FWM is less than |
IJECT/42/1/B-675 | |
8 | Power Reduction and Speed Augmentation in LFSR for Improved Sequence Generation and Compare in Different Nano Meter Scale
Vikas Sahu, Pradeep Kumar Abstract In many electronics circuit Linear Feedback Shift Register (LFSR) used for generating sequences. So for high performance applications LFSR should have to generate efficient sequences. There are so many methods of generating very efficient sequences. The demand and popularity of portable LFSR is driving designers to strive for small silicon area, higher speeds, low power dissipation and reliability. Compared to static LFSR, dynamic LFSR offers good performance. Wide fan-in logic such as domino LFSR is used in high-performance applications. Dynamic domino LFSRs are widely used in modern digital VLSI circuits. These dynamic LFSRs are often favored in high performance designs because of the speed advantage offered over static LFSR circuits. This paper compares different types of LFSR on the basis of performance parameter such as power consumption, propagation delay and leakage current at 65 nm, 45 nm, 32 nm and 25nm technologies for high performance LFSR design. The techniques are compared by performing detailed transistor simulations on benchmark circuits using Microwind 3 and DSCH 3 CMOS layout CAD tools. |
IJECT/42/1/B-676 | |
9 | An Efficient Adder Architecture for Cell Based VLSI Design
R.S.Kamalakannan, M.D.S.Nandini Abstract Adders are needed in the design of battery-powered portable devices. Although many fast adder architectures exist, most of them require transistor-level optimizations that prevent their synthesis in a standard-cell flow. This paper presents two Add-One Carry- Select Adders (A1CSA and A1CSAH) suited for standardcells synthesis. The Carry-Lookahead Adder, thus corresponding to the best choice for high speed and high.EA1CSA are better performance and fast adder design for cell based VLSI Design, it provides area reduction, delay, bit-width, speedup, fast adder. |
IJECT/42/1/B-677 | |
10 | Simulation Results of D & RS Flip Flop Using Schematics Circuits
G. Ramachandran, T. SheelaN., M B.Suganya Abiramavalli, G.Kavitha Abstract During the test mode of flip flop in a chip, a set of input vectors are sent through the flip-flop, it consumes more power consumption than in the normal functional mode. In this paper, we propose a latch with bi -stable element which reduces area as well as the power consumed. The latch proposed consists of simple basic gates involving two inverters back to back which acts as a bistable element and a transmission gate with the clock signal used to enable and disable the rest of the circuit with impact on running the latch on Static Timing Analysis. The input test vectors are either given by Automatic Test Pattern Generation (ATPG) or many other methods. We model this using Digital circuit schematics (DSCH) and see the power consumed. |
IJECT/42/1/B-678 | |
11 | A Low Power Consumption 0.18μm CMOS Differential-Ring VCO
A. S. Choudhari, S. V. Sakhare Abstract This paper proposes a low power consumption Voltage Controlled Ring Oscillator (VCRO) developed for 2.45 GHz. Frequency. The unique differential delay cell with 4 -stage has been adopted to fabricate the proposed voltage controlled ring oscillator (VCRO). 0.18 μm CMOS process is used for designing the proposed VCRO. The Voltage Controlled Ring Oscillator is design in Tanner EDA Version 13 environment. Power Consumption should be reduced to improve the performance of the VCRO. In addition to this the Ring Oscillator required less area than LC oscillator hence it is better to used in the circuit. The implementation of ring Oscillator in CMOS technique is easy. Due to the low power consumption & small area this VCRO will be the vital module for PLL (Phase Locked Loop). |
IJECT/42/1/B-679 | |
12 | PSO Based Optimization for Signal Integrity Issues in Interconnects
Subhash.J, John Milton. M Abstract As the feature size of integrated circuits shrinking in Deep Submicron Technologies (DSM) geometric (below 0.18_m), interconnect plays a major role in determining circuit performance. Here time delay, and crosstalk noise of interconnects become critical issues. The entire system operation degrades due to signal integrity effects like crosstalk, and propagation delay on High Speed Interconnects. Crosstalk arises due to the combination of signals in nearby interconnects and it is mainly due to self and mutual inductances and capacitances parameters of high speed interconnects. Here a full wave analysis based on Finite Difference Time Domain Method (FDTDM) is used for analyzing an interconnect structure. The variations of interconnect parameters are found out and the optimized value, which is suitable for chip designing is obtained by Particle Swarm Optimization Algorithm. Experimental results show that the proposed method has good level of accuracy and high efficiency |
IJECT/42/1/B-680 | |
13 | Review of Static Analysis Techniques for Error Detection and Avoidance
Shubha Puthran, Abhishek Dwivedi Abstract This paper reviews six current techniques in detecting some types of errors and bugs in programs. It also examines a new proposed system in Software Engineering. In all, a total of six techniques are examined and compared for their efficacy in addressing the issues that they aim to solve. |
IJECT/42/1/B-681 | |
14 | Long Term Evolution Receiver Scheme for Physical Uplink Control Channel
P. Manobala, A. Vijayalakshmi, S.Gowthami Devi Abstract In 3rd Generation Partnership Project (3GPP) Long Term Evolution (LTE) systems, physical uplink control channel (PUCCH) incorporate Reference Signals (RSs) for eNodeB to perform channel estimation. However the RSs in PUCCH formats 1/1a/1b/2/2a/2b are related to the transmitted 10th symbol in UE. As a result, the receivers have a priori knowledge about the transmitted RSs and perform channel estimation aided by all of the RSs directly. In this work, an efficient low complexity receiver is proposed for all PUCCH formats. |
IJECT/42/1/B-682 | |
15 | Advanced Information Extraction Method with Data Annotation
P. Srinivasan, A. Arun Abstract In the database community, work on information extraction (IE) has centred on two themes: how to effectively manage IE tasks, and how to manage the uncertainties that arise in the IE process in a scalable manner. Most recent IE approaches are suitable for only static corpora. A major drawback is, whenever a new extraction goal emerges or a module is improved, extraction has to be reapplied from scratch to the entire text corpus even though a small part of corpus might be affected. By using database queries, information extraction enables the generic extraction and minimizes re-processing of data It also extended to annotation for easily identifying the object such as name, date, per cent. To demonstrate the feasibility of our incremental extraction approach, experiments can be performed to highlight two important aspects of an information extraction system: efficiency and quality of extraction results. It is also extended to per-sentence extraction, it is important to notice that the query language itself is capable of defining patterns across multiple sentences. We describe a advanced method to optimize the execution of a single probabilistic IE query to employ different inference algorithms appropriate for Medline Database. We show that our techniques can achieve up to 10-fold speedups compared to our existing system. |
IJECT/42/1/B-683 | |
16 | Bandwidth Efficient Multicast Protocol for Ad-Hoc Networks
J. Rangarajan, Dr. K. Baskaran Abstract Mobile ad-hoc network is a dynamically reconfigurable wireless network without any centralized administration or infrastructure. Their completely distributed nature and their ability to operate without depending upon the deployment of any infrastructure, makes them ideal component of future mobile computing scenarios. This papers analyze the performance of Unicast Forwarded Cluster Based Multicast Protocol (UFCBMP) for MANET in terms of variation in size of the packet transmitted. In this protocol, source or receiver join messages are not broadcasted throughout the network like many other protocols. Thus, control overhead bytes are reduced. Simulation results show that the proposed protocol maintains the delivery ratio with minimum control overhead and bandwidth was efficiently used. |
IJECT/42/1/B-684 | |
17 | Interconnection of HVDC System
Arpita Shroff, Dr. Arvind Sharma Abstract DC Transmission Lines has various parameters to be considered for establishing the relationship between them and transient energy. By viewing the variations in transient energy levels, one can identify the fault conditions and get the idea of internal and external faults. For measurements of transient energy, voltage and currents are measured at the both the ends and faults can be detected on the basis of these measured currents and voltages. The major factors affecting the performance of the protection are (1) Fault Resistance & (2) Transmission Distance. There are several distributed parameters affecting the protection of the DC transmission lines and they are not only difficult in detection and measurements but they are also having worst effects on protection, especially over long distances. These distributed parameters can cause various types of faults in the transmission lines and hence they are required to be reduced at the max. There are mechanism to measure distributed parameters cumulatively and can be applied effectively to provide good quality performance in protection of DC transmission lines. This paper proposes a strategy to measure the various factors affecting the protection against the various faults which may occur due to distributed parameters. Based on the steady-state transmission-line equations, the distributed parameters of the DC line have been taken into account. The increments of transient energy in the DC line are utilized to identify internal fault and external fault. It can provide correct responses under various fault conditions including high ground resistance faults. The two main factors that affecting performance of the protection has been discussed: fault resistance and transmission distance and the relationships between the two factors and the sensitivity of transient energy protection have been deduced. |
IJECT/42/1/B-685 | |
18 | Iterative Fast Fourier Transform Based Technique for Failure Correction of Dolph Chebyshev Antenna Array With Minimum Side Lobe Level
R.Muralidharan, Gautam Kumar Mahanti, Ravinder Kumar Abstract This paper demonstrates an approach based on iterative fast Fourier transform for the failure correction of a linear antenna array for a certain fixed minimum side lobe level with nil variation in dynamic range ratio. The criterion that there exists an inverse fast Fourier transform relationship between the array factor and the element excitations of a linear antenna array is exploited. This approach has been verified for the Dolph Chebyshev antenna array with equal spacing between the consecutive elements for different number of elements with a maximum of three failures using simulated results. The effectiveness of the above mentioned method has been utilized for broadside angle. |
IJECT/42/1/B-686 | |
19 | Design of High Speed 4×4 Digital Multipliers Using Logical Effort Delay Model
Neha Agarwal, Satyajit Anand Abstract A fast and energy efficient multiplier is always needed in electronics industry especially in arithmetic units. This paper presents a comparative analysis of the delay optimization characteristics of three different 4×4 parallel digital multipliers. Theory of Logical Effort is implemented on all three multipliers for Delay optimization. Logical Effort provides a method for fast back-oftheenvelope estimates of delay in a CMOS circuit. The efficiency of the Logical Effort Delay model is analyzed by circuit simulation using Tanner EDA Tool at 180nm CMOS Technology. |
IJECT/42/1/B-687 | |
20 | A Study on the Performance of an AWGN Channel in a Communication System
K.M.L Sai Indrani, Pillem Ramesh Abstract Typical communications systems use several codes that are suited for correcting different types of errors. This paper examines the performance evaluation of phase shift keying (PSK) technique modulation without using the Reed-Solomon (RS) codes and using the Reed-Solomon codes. These Reed-Solomon codes can be effectively used for burst error correction. This particular type of codes was used to calculate the bit error rate through an Additive White Gaussian Noise (AWGN) channel. MATLAB is selected as the investigating tool. |
IJECT/42/1/B-688 | |
21 | Survey on Energy Conservation for WSN through Enhanced Routing Technique
Aaradhna Dubey, Rajender Singh Yadav, Rajneesh Agrawal Abstract In recent years, wireless sensor networks have been applied into real time application such as environment monitoring, health monitoring and military etc. The data in these applications are considered as critical. Hence, reliability of communication is crucial since real-time data must meet the deadline given for data transmission. To ensure the reliability in wireless sensor networks applications, power efficiency needs to be focused since sensor nodes have a limited power supply. As usage of wireless sensor network is rapidly increasing, the power efficiency in wireless sensor networks is a main factor to ensure the success of the technology. A substantial part of the energy of the nodes is consumed in routing process and initialization process in routing mechanism, what applies a significant impact on energy performance level. Most protocols examined energy level and performance in terms of the entire process of routing mechanism. As energy level is critical in evaluating the performance therefore it is being proposed to design an algorithm to evaluate the best route on the basis of the energy levels of the nodes alongwith other metrics. This will be useful in forwarding the packets to even long distances with the least burden on the nodes having less energy level. The store & forward technique is being applied for reducing the energy usage involved in getting routing information from other nodes. |
IJECT/42/1/B-689 | |
22 | Image Watermark Attacks: Classification & Implementation
Prabhishek Singh, Aayush Agarwal, Jyoti Gupta Abstract Digital Image watermarking is one of the popular techniques for authentication, identification and copyright protection. In order to verify the security and robustness of various watermarking techniques various specific attacks are applied to test them. So the robustness of the watermarking algorithm depends heavily on these attack tests. This paper clearly describes the classification of the attacks, and the implementation of some major attacks present. This paper briefly describes the complete concept regarding watermarking attacks, which will help the future researchers to work in this domain. Set of experimental results are also provided to show the effect of these attacks on watermarks produced using different watermarking techniques. |
IJECT/42/1/B-690 | |
23 | Comparison of Pre-, Post-, and Symmetrical Dispersion Compensation Schemes for 40 Gbps NRZ data at Single & Multiple Channels
Prachi Shukla, Kanwar Preet Kaur Abstract In this paper, the pre-, post- and symmetrical dispersion compensation schemes for Non-Return to Zero (NRZ) link using Standard Fibers (SMF) and dispersion compensated fibers (DCF) are analyzed to obtain optimum power at high data rate (up to 40 Gbps) optical transmission. Graphical analysis is done to evaluate the performance in terms of BER (bit error rate) and Q-factor. This paper compares all the three compensation methods and it will be shown that at the optimum power the symmetrical compensation method is superior to pre- and post-compensation method for single channel whereas post compensation is found to be the best scheme in case of multichannel optical transmission. |
IJECT/42/1/B-691 | |
24 | Slots loaded Truncated Rectangular Microstrip Patch Antenna with Defected Ground Structure for Broadband
Siddiqui Naushad Ather, P.K. Singhal Abstract Broadband truncated rectangular microstrip antenna with slots loaded and defected ground plane structure is presented in this paper to increase the bandwidth. It is found that the impedance bandwidth of a microstrip antenna could be enhanced considerably when a defected ground structure is used .The band width of a truncated rectangular microstrip antenna with slots was 15.2% whereas with defected ground plane in a truncated rectangular microstrip antenna with slots the bandwidth is increase up to 49.7% ranging from 2.65 to 4.4 GHz. The radiation pattern has acceptable response at both E&H plane. The antenna is design at FR4 glass epoxy substrate with dielectric constant 4.4 fed by a coaxial feeding technique. Detail of the proposed antenna and the simulated results are presented. |
IJECT/42/1/B-692 | |
25 | Mammogram Image Classification Using Wavelet Based Co-occurrence Features
Suman Mishra, M. Maheswaran Abstract Breast cancer is the second most common cancer with the second most cause of cancer-related deaths. The most effective way to reduce breast cancer deaths is detecting it earlier. Mammography is the most reliable option for detecting the breast cancer in the early stages.The proposed method aims at developing an efficient image processing algorithm to detect breast cancer at an early stage of the disease. Images from the MIAS database have been used for classifying them into two categories as normal and abnormal. Then the abnormal image further classified as benign and malignant. Five Haralick features are extracted from the segmented mammogram images such as: Energy,Contrast, Correlation, Homogeneity, Entropy.Image Classification is carried out by Probability Neural Network.The results show that, it is possible to classify the microcalcification, based on cooccurrence features extracted from the segmented mammogram images, providing benefit to patients’ diagnosed as malignant to undertake cancer treatment, whereas other patients may be spared from unnecessary biopsies. |
IJECT/42/1/B-693 | |
26 | Performance and Analysis of Optical Encoder and Multiplexer Using MZI Switching
Abhishek Raj Abstract It is an established fact that the bit rate of an optical network is slowed down by the optical to electrical to optical conversion(OEO),here a simple all optical logic device is composed by using a Semiconductor Optical Amplifier and an optical coupler, it is known as a Mach Zehnder Interferometer. This device is used for generating an optical Multiplexer and an optical Encoder. The simulation of Encoder and multiplexer is done at a rate of 10GB/s and both are simulated for different input logical entities. |
IJECT/42/1/B-694 | |
27 | Power Law Transformation and Adaptive Gamma Correction: A Comparative Study
Viney Dhawan, Gaurav Sethi, Virender Singh Lather, Khushneet Sohal Abstract This paper describes the study of the image enhancement and provides the comparison between power law transformation and Adaptive Gamma Correction Weighted Distribution (AGCWD). In this paper, we will describe the importance of image enhancement and we will represent the two techniques or algorithm for image enhancement. In first algorithm power law transformation in which we will give the value of gamma manually, but in the second algorithm AGCWD (Adaptive gamma correction weighted distribution) in which the value of gamma will be optimize automatically. In this comparison of both techniques, we will show the qualitative and quantitative results. |
IJECT/42/1/B-695 | |
28 | Enhanced Image Separation Using Adaptive Dictionary Learning
R.Deepa, L.M.Varalakshmi, G.Saranya Abstract Sparsity is very useful in source separation of multichannel observations. The sources of interest are not sparse in their current domain and needs to separate using a known transform or dictionary. If such a priori knowledge about the sparse domain of the sources is not available, then the algorithms will fail to recover the sources. This problem will be overcome by fusing the dictionary learning into the source separation and extension of the denoising method, using a local dictionary is adaptively learned for each source along with separation. It speeds up the process and improves the quality of the image source separation even in noisy situations. The proposed algorithm is Multichannel Morphological Component Analysis (MMCA) for BSS (Blind Source Separation) is done and the image is recovered efficiently. |
IJECT/42/1/B-696 | |
29 | Wireless Body Area Sensor Network Based Health Monitoring System
S.M.Mahalle, P.V.Ingole Abstract In the project, Design and Implementation of Wireless Body Area Sensor Network Based Health Monitoring System, we propose to design a wearable system by using wireless body area sensor network (WBASN) for continuous health monitoring of human being. This proposed Wireless Body Area Sensor Network (WBASN) will consist of number of inexpensive, lightweight, and miniature sensors, each capable of sensing changes in one or more physiological parameters. In the proposed design we plan to use the physiological sensors to ubiquitously monitor the health parameters viz; pulse rate, body temperature, blood pressure. According to the requirements of health monitoring system, the system is plannedto usethe long-range wireless communication technology GSM in this health monitoring system. |
IJECT/42/1/B-697 |