IJECT Vol. 10.4 (Oct – Dec 2019)

INTERNATIONAL JOURNAL OF ELECTRONICS & COMMUNICATION TECHNOLOGY (IJECT)
Vol 10 Issue 4 (Oct – Dec 2019)


International Journal of Electronics & Communication Technology Vol 10 Issue 4 (Oct – Dec 2019)
S.No. Research Topic Paper ID
01 Review Paper on Comparison between 40nm n-channel Double Gate and TRI-GATE MOSFET
Jasbir Kaur, Ravinderpreet Singh

Abstract
MOSFET is the most important device in modern high-density advanced Integrated Circuits (IC). Since 1970 the gate length of MOSFETs in production ICs has been scaled down at a rate about 13% per year, and it will continue to shrink in the foreseeable future. The reduction of device dimensions is driven by requirements for both performance and density. The physical dimensions of bulk MOSFETs have been aggressively scaled down and these conventional devices will soon be experiencing limited improvements due to the scaling down. In order to continue performance improvements, new device architectures are needed. As the scaling of MOSFET into sub-40nm regime, DG-MOSFET and TG-MOSFET have replaced traditional bulk MOSFET. This paper comprises the variations in threshold voltage of 40nm DGMOSFET and TG- MOSFET by using different Doping profiles, variation in the Biasing voltages, variation in the gate material, variation in gate oxide thickness, sub-threshold swing, Ion/Ioff ratio and Drain Induced Barrier Lowering (DIBL).
Full Paper
IJECT/104/1/A-555
02 Design of Less Voltage Quadrupler DC Converter
Kaleeswari.O

Abstract
In this paper, a novel transformer-less adjustable voltage quadrupler dc–dc converter with high-voltage transfer gain and reduced semiconductor voltage stress is proposed. The pro-posed topology utilizes input-parallel output-series configuration for providing a much higher voltage gain without adopting an ex-treme large duty cycle. The proposed converter cannot only achieve high stepup voltage gain with reduced component count but also reduce the voltage stress of both active switches and diodes. This will allow one to choose lower voltage rating MOSFETs and diodes to reduce both switching and conduction losses. In addition, due to the charge balance of the blocking capacitor, the converter features automatic uniform current sharing characteristic of the two interleaved phases for voltage boosting mode without adding extra circuitry or complex control methods. The operation principle and steady analysis as well as a comparison with other recent exist-ing high step-up topologies are presented. Finally, some simulation and experimental results are also presented to demonstrate the effectiveness of the proposed converter.
Full Paper
IJECT/104/1/A-556